1. Field of the Invention
The present invention relates to a mixed voltage input buffer.
2. Discussion of Related Art
Generally, in order to manage mixed voltage in a semiconductor device which uses various voltages, the mixed voltage input buffer provides various usefulness, namely it is used in a corresponding application field by having an optimum threshold level for respective voltages and a little power consumption. Particularly, a PCMCIA system can use such a characteristic at maximum. That is, a host adapter is internally separated into several function blocks, and the respective blocks operate independently and also use the mixed voltage independently. In a card interface part, since there is no power supply in case there is not the card, a control of various powers is required.
FIG. 1 is a circuit diagram of a conventional and general input buffer, and referring to FIG. 1, conventional art is described as follows. In FIG. 1, No. 1 is an NOR gate, No. 2 is an inverter, reference character CO is a final output value, a PAD is a connection pad, a CVDD is a core power, an NVDD indicates the highest voltage in chip. In FIG. 1 PDA is an enable signal of an input buffer and in a state like a card power off it becomes `high` to make a transistor 660 `off`, thereby the power consumption of the buffer is reduced. But, in the input buffer having the NOR gate 1 made up of MOS(metal oxide semiconductor) transistors from 660 to 663, the core power CVDD is used, therefore the power consumption in a case like the following is large. Namely, in case the voltage of the core power is higher than that of the card power, a voltage level of an input signal being inputted through the PAD is lower than that of the core power. Therefore, specially in a non-transition state the power consumption in the buffer occurs. Also, since the card power and power of the buffer receiving an input of the card are independent of each other, characteristic of the buffer sensitively operates in a fluctuation of a power supply voltage.
Conventionally, that is, power of the buffer and the input signal is independently used in non-transition state in the midst of chip's operation, thereby in case the power voltage of the buffer is higher than that of the input signal, there is problem causing current consumption.